Talent 101 Circuit

Javier – IC Layout Designer

• Principal level RF/Analog/Mixed-Signal IC Layout Designer  with extensive experience in layout floor planning, standard cell planning, hierarchical layout assembly, device matching, place-and-route (P&R) of large digital and analog blocks, shielding and guard ringing, DFM, tape out GDSII format and E-beam mask generation
• Broad and deep knowledge in multiple complex designs for PMIC, analog, digital, mixed-signal, high speed GHz RF, Datapath and standard cells
• Enjoy being a leader of new companies or capable of doing stand-alone work or leading a back-end team
  • Comfortable being a contractor or direct hire
• Managed/supervised up to twenty-five (25) designers and six (6) projects concurrently
• Able to work from home, WFH, remotely or onsite to design layouts for entire integrated circuit, construct layout plans, create, debug and document new design flows
  • Deliveries made on-time with minimal area
• Passionate about doing the business development necessary to create companies to innovate and design solutions for complex problems for new markets
• Experienced in layout design of specific components and cells like low noise/low power RF components, ESD structures, large digital and various analog blocks
• Very strong analytical and problem-solving skills, with an ability to create or debug custom physical design kits and flows
• Technical Skills & Tools:
  • Platforms: Unix/Linux Redhat, Netlists, Microsoft Office.
  • Spectrum Internet: Typical download speeds 200 Mbps. Available 1 Gbps
  • Tools: Cadence 6.1/12.0 Virtuoso VXL, First Encounter, Assura, PVS, Mentor Calibre, Synopsys LVS, Windows Office
  • Technologies: IBM 6-7 nm, Samsung 10-14 nm Finfet, TSMC 65-20 nm Finfet, TSMC/Global Foundries 40-130 nm
  • Hardware and environment: 27-inch HP monitor, HP Spectre X360 15X laptop, private office