Eva – FPGA/ASIC Design Engineer
- High speed, high throughput, low latency FPGA design architecture for network devices and high-performance computation systems
- Extensive experience with Xilinx multigigabit transceivers (GTY, GTX, GTH, GTP) in different modes of operation with data rates from 100 Mbit/s up to 25 Gbit/s, experience with top families of Xilinx FPGAs
