Fang – Physical Design/Digital Back end Engineer (available July 1, 2017)
Part of physical design team, worked closely with digital and analog teams to deliver design of mixed signal block on time under tight schedule
- Working on complex digital on top lower power design
- Define and verify power intent
- RTL synthesis
- Equivalence check
- Floorplan
- Define power domain and power routing
- Insert power switches
- Isolation and retention cells placement
- CTS and routing
- STA timing analysis
- Worked on top level timing closure
- Bump placement, place bumps with various patterns, assign signals to bumps
- Floorplan, pin placement, RAM placement, power meshes, analog block placement
- Clock tree generation using ccopt
- Worked on timing analysis/closure at both top and block level
- Worked on diversified designs of high utilizations, irregular shapes, and complex clock tree structure with Encounter Foundation Flow