Talent 101 Circuit

Kent Smith

Kent Smith is a Senior Business Development Manager at Talent 101. He is responsible for managing the semiconductor engineering solutions at Talent 101’s clients. His expertise includes recruiting and workforce solutions, and working with engineering groups at Talent 101’s clients to improve business performance.
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Product Engineer with Experience in development, quality, and engineering design

Posted on May 30, 2018 by Kent Smith

Kali – Product Engineer

  • Product Engineering professional with extensive experience in new product development, quality, and engineering design.
  • Produced 100% locally sourced Chinese reciprocating saw for US market, a first for Bosch.
  • Product placement at Walmart generated $5M a year annually.
  • Managed, designed and manufactured commercially sold products using internal and external facilities (Chinese suppliers).
  • Key Account Management New Product Development Introduction Expertise Engineering Processes Improvement Product Testing/Validation/Approvals Supplier Development (Asia/China) ASQ Certified, Engineer and Auditor (CQE & CQA)

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Product Development/Testing Engineer

Posted on May 25, 2018 by Kent Smith

Jak – Product Development/Testing Engineer

  • In-depth semiconductor physics knowledge and experience in Embedded Microcontroller Architectures, Flash Memories, VLSI CMOS mixed-signal devices, wafer / package assembly, ATE / bench testing, data analysis, characterization, qualification, new product release, and sustaining product engineering methods.
  • Familiar with QS9000, ISO9001, TS16949, DOE’s, DVP&R’s, DFMEA, PFMEA, DFT, MIL-STD 883, EIA/JEDEC Standards, 8-D Reports, and high volume manufacturing principles. Knowledgeable in qualification / reliability tests such as OLT, Steady State Life, Temperature Cycling, Thermal Shock, HAST, Moisture Resistance, and Variable Frequency Vibration.
  • Demonstrated leadership ability as Product Team Leader coordinating the efforts of cross-functional Product Development Teams consisting of (Design / Layout, Wafer Processing, Yield Enhancement, ATE Testing, Failure Analysis, Application Engineering and Marketing) for developing and qualifying new leading edge products for high volume manufacturing.
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Test Engineer Available for Hire

Posted on May 23, 2018 by Kent Smith

Joran – Test Engineer

  • System level tests with RGB image inputs to exercise DRAM controller and DMD serial link controller. Wrote Perl script to convert model output to RGB images. Debug DRAM and sequencer settings.
  • Test bench for ARM Cortex subsystem with AXI, AHB, TCM, APB bus, bridges and peripherals. Wrote checkers and tests to exercise all the bridges and peripherals including SPI and OCP interface with SPECMAN.
  • Test plan for Parallel Flash Controller and wrote SPECMAN model of NAND flash memory. Tested program fetches and execution from ARM and uncovered functional bugs through Incisive RTL simulator.
  • Test bench for AHB router with ARM and 2 DMA masters. Wrote tests to exercise AHB master arbitration and debug cases of bus protocol checker violations. Collected and analyzed functional and code coverage data. 
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Professional engineer with experience in Product/Test engineering

Posted on May 21, 2018 by Kent Smith

Benny – Product Engineer

  • Professional engineer with extensive experience in semiconductor Product/Test engineering with various testers and debugging skills in automotive, computing platform products and off the shelf products. Hard-working, dynamic, flexible to accomplish organization’s priorities and always willing to learn and explore new things. An Individual contributor, a great team player that can multiplex multiple projects effectively and efficiently with high quality.
  • TE TESTERS - Teradyne A585, J750,
  • Fusion, LTX-EX/CX, Polaris/VEGA, VLCT
  • LANGUAGES  - Assembly, C, C++, Python, PERL,  Mega Pascal, VBA, Matlab
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Senior Analog RF Layout Design Engineer

Posted on May 18, 2018 by Kent Smith

Ahmed – Senior Analog RF Layout Design Engineer 

  • Cadence Virtuoso 6.1.7 Open Access, Cadence GXL/VXL, Cadence Diva, Cadence Dracula
  • Cadence Assura for LVS/DRC/Parasitic Extraction
  • Cadence VCR, Cadence P-Cell Creation, Cadence Multiple Part Path
  • Cadence Shape Based Router  (CSR) Cadence  Space Based Router
  • Cadence Automatic Router Cadence Wire Assistant
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Senior FPGA/ASIC Designer with 15+ experience of Logic Design/Verification

Posted on May 16, 2018 by Kent Smith

Jerry – Senior FPGA/ASIC Designer

  • Logic design and verification, behavioral modeling and analog mixed-signal simulation and debug skills. Expertise in Verilog and VHDL coding, functional verification, synthesis, timing analysis, and micro architecture. Wrote and ran regression tests using TCL.
  • Wrote VHDL and Verilog for DSP libraries and simulated these functions using MODELSIM.
  • Wrote Perl programs to run all the VHDL and Verilog simulations.
  • Logic Design/Verification (15 yrs.), RTL coding (10 yrs.), Verilog (10 yrs.), VHDL (10 yrs.).
  • Analog Mixed-signal Simulation (Using SPICE and ModelSim) (18 years), UNIX (14 yrs.).
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Senior IC Layout Design Engineer

Posted on May 14, 2018 by Kent Smith

Shima – Senior IC Layout Design Engineer 

  • Lead, schedule and plan circuit projects that are both efficient and cost effective within time scheduled
  • Supervised and instruct team members through all phases of project
  • Created layout that can and will save silicon waste and dollars
  • Created the tightest compaction of layout possible
  • Performed layout of Analog and Digital circuits in 250nm, 180nm, 130nm, 90nm, 65nm, 45nm, 40nm, 28nm and 10nm/finfet technologies
  • Performed layout of RF/Analog circuits
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Software Quality Assurance (SQA) Engineer with experience in SDLC

Posted on May 11, 2018 by Kent Smith

Abdul – Software Quality Assurance (SQA) Engineer 

  • Strong background in full software development life cycle (SDLC). 
  • Proven history of writing detailed test plans and test cases from design specifications. 
  • Executes manual and automated test cases ensuring delivery of quality software products.
  • Success working with changing priorities and responding to critical issues. 
  • Conscientious contributor completing tasks on or ahead of schedule. 
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Senior Test Technician (Available Now)

Posted on May 09, 2018 by Kent Smith

Ryan – Senior Test Technician

  • Ensured quality of work/product met Company standards, worked closely with QA Engineer daily
  • Complied with policies, guidelines and regulatory requirements per Avigilon's Quality Management System
  • Received product, sorted, debugged, and evaluate, reported failures/concerns
  • Debugged electronic circuits and troubleshoot and reported issues
  • Analyzed errors in electronic design and production, defining failure modes
  • Provided detailed product evaluation information to help drive improvements and corrective actions
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Verification Engineer with experience in RF Circuits and Network Theory

Posted on May 07, 2018 by Kent Smith

Kyle – Verification Engineer

  • RF Circuits & Network Theory
  • Link budget, EVM
  • LNA, Mixer, Pa and Filters
  • Switch, Transmitter & Receivers
  • RF testing, troubleshooting, debugging, developing & automated test systems
  • PCBs test & repair, QA & QC
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