Talent 101 Circuit

Aria – Analog Integrated Circuit Layout Designer  

• Analog Integrated Circuit Layout Designer for Hi Speed OpAmp Section. Lab Manager, Equipment Engineering Technician, Troubleshooting to component level. Wafer Fab 
• HARDWARE: Sun Unix Ultra 60 workstation, HP4145B Semiconductor Parameter Analyzer, HP8753E Network Analyzer, HP4156A Parameter Analyzer, HP 8563E Spectrum Analyzer, Cascade Microtech Probe Stations 4800, 5000, 5500, Oscilloscopes, DMMs, Bench test equipment.

Suf – Analog Layout Engineer

• Tope and Block Level Layout experience for Analog & Mixed Signal Technology

• Cadence Tools

Processes:

• LBC7, LBC8, LBC8HV, LBC8LV, LBC9, LBC9PLV, LBC5, 50HPA07, HPE35, BICOMHD, 1033BCOM3zl, 118C021A, TSMC .18 um, 1P6M, TowerJazz TS18PM .18 um, CMOS and TowerJazz SBC18H3A1P6 SIGe, .35 um and .6 um customer  processes  and nanometer FINFET  processes.