Semiconductor

Engineering & Workforce Solutions

We work with semiconductor and electronics companies around the world to provide end-to-end engineering and workforce solutions.

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Talent 101 is a global services provider for the semiconductor industry. We provide a total workforce solution anywhere you need it: onshore, nearshore, or offshore.

Our Services

engineering services

Engineering Services

  • Hardware
  • Software
  • Mechanical
  • Test
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Managed Services

  • Oversee your organization and systems
  • Manage everyday workforce responsibilities
  • Complete team approach from management through individual contributors
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Project Services

  • Statement of Work style projects pinpoint required skills and experience needed 
  • Defined budget per project
  • Detailed timeline start to finish
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Staffing Services

  • Contract & Contract to Hire
  • Direct Hire

Available Talent

Analog IC Design Engineer

Ti – Analog IC Design Engineer

  • Designed analog-integrated circuits for automotive applications, including band-gap circuitry, oscillator, voltage monitor, power supply unit, driver and fall-monitoring circuitry.

  • Interacted with customers to address needs and define design specifications.

  • Determined design approaches, circuit topology and verified through simulation.

  • Reviewed IC layout and evaluation-board design.


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Test Technician

Fidel – Test Technician  

  • Testing/Troubleshoot mechanical and electrical systems

  • Troubleshoot Electronics to component level, board level and system level

  • Troubleshoot Mechanics sub-assemblies, assemblies and systems

  • Soldering SMT and Thru-hole components

  • Reading Schematics, Microfiche and Blueprints


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AMS Verification Engineer

Chang – AMS Verification Engineer  

  • Verilog A

  • Identify and log bugs

  • Work with Design team to resolve issues


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Senior Analog RF Layout Design Engineer

Sophia – Senior Analog RF Layout Design Engineer

  • Cadence Virtuoso 6.1.7 Open Access, Cadence GXL/VXL, Cadence Diva, Cadence Dracula

  • Cadence Assura for LVS/DRC/Parasitic Extraction

  • Cadence VCR, Cadence P-Cell Creation, Cadence Multiple Part Path

  • Cadence Shape-Based Router (CSR) Cadence Space-Based Router


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recruit-women-STEM
How to recruit more women to work in STEM

Trying to create more gender parity in your organization is a tough but worthwhile goal. Unfortunately, gender bias— even if it’s not intended— is quite common in the tech and chip industry, where organizations tend to promote and favor masculine actions and behavior. Negative peer pressure, harassment, and skewed representation of women who pursue careers in STEM fields are also major problems in workplaces and the culture at large. There’s no denying that women face and experience unique barriers to success. But many are making strides that shatter the glass ceiling and prove that female engineers, developers, or scientists are crucial to innovation and creative problem-solving.


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scope-creep-t101
Scope Creep: What causes it and how to tame it

Sometimes things don’t go quite as planned. You commit to checking off a few tasks for the day, and suddenly a change to the budget or revision in the project brief takes you back to square one. What was supposed to be a clear and straightforward project now requires longer development times, more resources, or aggressive deadlines. The productive day you wished for took a turn didn’t expect. This phenomenon, called scope creep, happens to the best of us.


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how-to-maximize-analog-design-productivity
How to maximize productivity for your analog design team

Chip engineers in small teams are often knee-deep in a wide range of different tasks and projects. From client management and design layout to data analysis and testing, they have their work cut out for them. The mantra “do more with less” has become a popular strategy for running lean teams in many semiconductor companies. While this approach saves time and money, engineers may risk quality, productivity, and performance.

This scenario plays out all too often in high-performing design teams when engineering leaders lose sight of purpose, processes, and people. Deadlines get aggressive, development times are uncertain, and the results become questionable. The price to pay is immense, and companies can’t afford to fall short on testing, especially when pattern generation (PG) is on the line. So what do you do?


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