Talent 101 Circuit

Design/Layout Engineer with over 10 years of experience

Posted on August 02, 2019 by Nick Trompert

Wang – Design/Layout Engineer   

  • Design/Layout Engineer with over 10 years’ experience dealing with the design/layout of analog and/or mixed signal products
  • Design lead of Serial EEPROM (SPI/I2C) products which include analog (voltage/current
    references), and +16V (charge-pumps, regulators, level-shifting) circuit blocks
  • Design lead of RTCC products (SPI/I2C) which include analog (voltage/current references), memory (EEPROM, SRAM), and +16V (charge-pumps, regulators, level-shifting) circuit blocks
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PCB Layout Designer with experience in Electronics Engineering Technologies

Posted on July 15, 2019 by Nick Trompert

Jake – PCB Layout Designer   

  • Mentor Expedition 
  • Mentor Design Capture
  • Mentor DX Designer
  • Cadence Allegro
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Layout Engineer

Posted on April 03, 2019 by Nick Trompert

Vidal – Layout Engineer  

  • Perform chip level physical Analog Custom Layout design using latest Cadence Virtuoso Layout Editor VLE/VXL layout tools and techniques for optimization of speed, power, and area (.35um & .7um technologies).
  • Excellent device matching techniques along with debug and verification ability at device, cell, block, and chip levels.
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Senior Analog RF Layout Design Engineer

Posted on February 27, 2019 by Nick Trompert

Sophia – Senior Analog RF Layout Design Engineer

  • Cadence Virtuoso 6.1.7 Open Access, Cadence GXL/VXL, Cadence Diva, Cadence Dracula

  • Cadence Assura for LVS/DRC/Parasitic Extraction

  • Cadence VCR, Cadence P-Cell Creation, Cadence Multiple Part Path

  • Cadence Shape-Based Router (CSR) Cadence Space-Based Router

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PCB Layout Designer

Posted on January 22, 2019 by Nick Trompert

Jake – PCB Layout Designer

  • Mentor Expedition

  • Mentor Design Capture

  • Mentor DX Designer

  • Cadence Allegro

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Layout Design Engineer with skills in analog layout and RF design techniques

Posted on September 24, 2018 by Nick Trompert

Bonnie – Layout Design Engineer  

  • Layout Design Engineer with extensive experience in all phases of microchip layout design and ability to work independently to meet aggressive deadlines
  • Strengths in analog layout, RF design techniques, including shielding, matching, common centroiding cross-coupling, interdigitation etc.
  • Effective Executive layouts from floor plan to tape out, enabling design engineers to analyze, simulate, and create design improvements in a synergistic and timely manner.
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Senior Layout Engineer with Strong People, Team-building, and Project Management skills

Posted on July 30, 2018 by Nick Trompert

Maria– Senior Layout Engineer   

  • Senior IC Layout Designer/Leader with strong people, team-building, and project management skills
  • Lead Layout Designer, for new Rad Hard Microwave 10GHZ designs.
  • Utilizing SiGe IBM,HP for RF circuitry (TX, RX) etc
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Senior Analog RF Layout Design Engineer

Posted on May 18, 2018 by Kent Smith

Ahmed – Senior Analog RF Layout Design Engineer 

  • Cadence Virtuoso 6.1.7 Open Access, Cadence GXL/VXL, Cadence Diva, Cadence Dracula
  • Cadence Assura for LVS/DRC/Parasitic Extraction
  • Cadence VCR, Cadence P-Cell Creation, Cadence Multiple Part Path
  • Cadence Shape Based Router  (CSR) Cadence  Space Based Router
  • Cadence Automatic Router Cadence Wire Assistant
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Senior IC Layout Design Engineer

Posted on May 14, 2018 by Kent Smith

Shima – Senior IC Layout Design Engineer 

  • Lead, schedule and plan circuit projects that are both efficient and cost effective within time scheduled
  • Supervised and instruct team members through all phases of project
  • Created layout that can and will save silicon waste and dollars
  • Created the tightest compaction of layout possible
  • Performed layout of Analog and Digital circuits in 250nm, 180nm, 130nm, 90nm, 65nm, 45nm, 40nm, 28nm and 10nm/finfet technologies
  • Performed layout of RF/Analog circuits
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Analog Layout Design Engineer with 10+ Years experience

Posted on March 21, 2018 by Kent Smith

Ali – Analog Layout Design Engineer

  • 10+ years’ experience
  • Experience working on  Optical, Voice and Memory chips
  • Experience with both Chip and Block level work
  • DAC, Controller, Bi-CMOS, CMOS, LDO, PLL, ADC
  • Global Foundries, TSMC, Xfab Processes

 

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