Talent 101 Circuit

Senior Analog RF Layout Design Engineer

Posted on May 18, 2018 by Kent Smith

Ahmed – Senior Analog RF Layout Design Engineer 

  • Cadence Virtuoso 6.1.7 Open Access, Cadence GXL/VXL, Cadence Diva, Cadence Dracula
  • Cadence Assura for LVS/DRC/Parasitic Extraction
  • Cadence VCR, Cadence P-Cell Creation, Cadence Multiple Part Path
  • Cadence Shape Based Router  (CSR) Cadence  Space Based Router
  • Cadence Automatic Router Cadence Wire Assistant
  • Mentor Calibre LVS/DRC/Parasitic Extraction/Metal Poly Fill
  • Synopsis Hercules DRC/LVS
  • Bachelor of Technology - Electrical Engineering
  • Performed analog mixed signal IC Physical Design engineering functions and responsibilities using CADENCE 6.17 and MENTOR CALIBRE software:
    • Created transistor level layouts from schematic (Cadence 6.17 Virtuoso VXL)
    • Created block level layouts per schematic
    • Created manual fill in sensitive areas (Inductors, transmission lines and sensitive signals
    • Participated in migration process from 28nm to 22nm
    • Verified and corrected migrated cells using Cadence and Mentor LVS/DRC tools

Contact Us About This Candidate

Topics: Analog Designer, Layout Designer

Kent Smith

Kent Smith is a Senior Business Development Manager at Talent 101. He is responsible for managing the semiconductor engineering solutions at Talent 101’s clients. His expertise includes recruiting and workforce solutions, and working with engineering groups at Talent 101’s clients to improve business performance.