Talent 101 Circuit

Senior IC Layout Design Engineering Leader Available

Posted on January 27, 2017 by Kent Smith

Maria– Senior Layout Engineer  

  • Senior IC Layout Designer/Leader with strong people, team-building, and project management skills.
  • Lead Layout Designer, for new Rad Hard Microwave 10GHZ designs.
  • Utilizing SiGe IBM,HP for RF circuitry (TX, RX), etc.
  • Created various IP in 45nm blocks.
  • Trained on the new 10nm FinFET process.
  • Performed layout on various FinFET Macros.
  • Utilizing bicmos 8HP- 90nm, and cms 9flp-130nm for RF Circuitry.
  • Currently kicking off new 14nm FinFET IBM projects for various new designs.
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Experienced Lead Senior System Engineer Available

Posted on November 30, 2016 by Kent Smith

Manuel – Lead Senior System Engineer  

  • Deep understanding of analog matching requirements, common centroid techniques for minimizing V offsets in matched pairs and other circuits; ensuring high yield processing and circuit performance through the use of identical processing environments/device orientations, dummies, WPE compliant enclosures, etc.; capacitive coupling minimization through the use of spacing and/or co-ax shielding on critical AC signals.
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