Talent CIRCUIT | Mixed Signal Design Engineer

Digital Design & Mixed Signal Digital Verification Engineer

Posted on August 18, 2020 by Nick Trompert

Highly motivated senior design engineer with experiences in chip and board design.
Experienced with digital and analog/digital mix-signal SoC integration and verification, logic synthesis, chip and block level verification, DFT, ATPG, static timing analysis, chip bonding, floorplan, clock tree synthesis, Place and Rout.

Posted on September 17, 2019 by Nick Trompert

Semiconductor advance node processes: BiCMOS, CMOS and FinFET. Create custom design reference database for advanced process nodes: FinFET 14nm, 11nm, 10nm, 8nm, 7nm.
Experience with op amps, high-speed SerDes designs and adaptation process for serial link.
Front-to-back experience with transistor level design: Cadence tools (Schematic XL, ADE L/XL, Spectre (RF), Virtuoso Layout XL, PVS DRC / LVS, and QRC extraction).

Posted on March 28, 2018 by Kent Smith

Physical design engineer with experience in mixed-signal circuit design.
Experienced in all phases of circuit / physical design including synthesis, static timing analysis, optimization, and implementation.
Experienced in technical project management, high-speed memory design (SRAM), and design flow development.
Physical Design, Mixed-Signal Design, Project Management, SOC Encounter and RTL to GDS
Static Timing Analysis, Circuit Simulation, Synthesis, Spectre/MDL and EMIR
Magma, Virtuoso, ICC, HSPICE and Cadence
TCL, Synopsys, Primetime, RTL Compiler and ASIC
B.S. in Electrical Engineering

Posted on February 02, 2018 by Kent Smith

10+ years of experience in Analog, Mixed Signal and High-speed IO Layout Design of modules and Chip level tasks.
Worked on various technology nodes like 180nm, to 10nm
Proficient in layout design using Cadence Virtuoso XL and Genesys
Custom layout design of blocks, IPs and Full Chip Integration
Floor planning, Power planning and Area estimation of modules
Special planning during placement considering density, HV,EMIR,DRC in deep submicron nodes
Physical Verification of the layout designs

Posted on January 24, 2018 by Kent Smith

Analog, mixed signal, and high-performance RF IC design.
Switching power converters, LDOs, DC/DC, Buck and Boost, and Power ICs.
Hall sensors for automotive industries.
Analog interface circuits for MRAM, DDR interface.
Ultra-high accuracy CMOS frequency references with mitigated aging.
High-performance RF IC Design and Analog/Mixed Signal IC Design.
State-of-art low-noise and low distortion RF/analog front-ends.
Wireless transceiver system design, video-receivers and mass-storage channels.
IC subsystem design: PLL’s, DDL’s, gain-controls and gm-C filters.
CMOS, BiCMOS and bipolar IC block design such as: LNAs, mixers, phase shifters, amplifiers, comparators, PAs, VCOs, charge pumps, ADCs, DACs, LDOs, power supplies, and bias blocks.

Posted on January 22, 2018 by Kent Smith