Vinod – AMS Engineer
- 10+ years of experience in Analog, Mixed Signal and High-speed IO Layout Design of modules and Chip level tasks.
- Worked on various technology nodes like 180nm, to 10nm
- Proficient in layout design using Cadence Virtuoso XL and Genesys
- Custom layout design of blocks, IPs and Full Chip Integration
- Floor planning, Power planning and Area estimation of modules
- Special planning during placement considering density, HV,EMIR,DRC in deep submicron nodes
- Physical Verification of the layout designs