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Eagle Product/Test Engineer

A detail-oriented hands-on engineer with expertise in process technology and mixed-signal design automation, process improvement and automotive quality assurance with strength in IC product and test engineering. A dependable problem solver who identifies and addresses issues to increase operational efficiency.

• Developed and optimized test solutions for catalog devices, including SWIFT family of DC-DC converters, voltage regulators, charge pumps, voltage supervisors, and operational amplifiers.
• Handled release to production of probe and final test programs on Eagle and Teradyne testers. Oversaw lab bench verification and handling of customer returns through QTS system, as well as root cause identification through FA.

PCB Designer/Technician

• PCB Layout, Schematic Capture, Hardware Assembly
• Mechanical Design and Prototyping with Digital, Analog, and Mixed Signal Circuits
• Board Level Troubleshooting and Debug of Digital, Analog, and Mixed Signal Circuits
• Research and Data acquisition/Technical Documentation
• PC Hardware/Software Build, Installation, Troubleshoot, and Debug

Sr. ASIC/FPGA Designer

Accomplished Senior Design Engineer with 15+ years’ experience. Successfully developed 9 ASIC and 4 FPGA projects from conception to production release. Strong innovator of design architectures and implementations which enhance product functionality, simplify ASIC/system implementation, or minimize ASIC back-end design and verification efforts.

Eagle/Teradyne Test Engineer

Senior Staff Test engineer with extensive knowledge and training in yield enhancement, test time reduction and troubleshooting on Eagle/Teradyne ATE Machines. Major contributions and achievements converting ATE Programs to different platforms

• For the last Thirteen years, have developed tests on various ATE (Automated Test Equipment) for Semiconductor IC’s (Integrated Circuits) using Teradyne Flex, Credence Test Systems 3050/5020, and Eagle Test Systems ETS300/ETS500
• Developed tests for various types of IC devices, such as: Accelerometer/Gyro, Bar Code Scanner ASIC (Application Specific Integrated Circuit), IGBT (Insulated-Gate Bipolar Transistor) driver ASIC for automotive ignition systems, Buck Regulators, Phase Slice Regulators, DC to DC Converters, High Speed Comparators, and 6 bit ADC’s

Characterization/Post Silicon Validation

A dedicated and results-driven characterization engineer, with broadly diverse expertise encompassing mixed signals, analysis, bench equipment, ATE and PLL characterization, PCB design, testing, hardware software; also capable of post Silicon Validation

• Designed VXI test fixture that permitted large pin count mixed-signal codec and power management ICs to interface with VXI-mainframe with complete array of relays.
• Characterized large-scale mixed-signal ICs, including Audio CODECs, ADCs, DACs, Class “D” Amplifiers, and PLLs, using VXI, PXI and GPIB equipment and software. Developed ACE ABB Mother Board Version 3 and defined early architecture of ACE database structure.
• Characterized parametric and timing performance of highly integrated CODECs, DACs, and ADCs.

Digital Design / Verification Engineer

Over 10+ years of IC design, development and verification experience. Have complete ASIC/FPGA design cycle experience from specification, RTL design & verification, synthesis, silicon debug, manufacturing support, and application support to production release on multiple parts. Extensive Lab debug experience.

• Verilog, VHDL, SystemVerilog, C, Perl, Tcl
• Developed the verification environment to verify the Serdes IP supporting EPON, GbE, XAUI, SATA0/1, PCIE (1x, 4x, 8x) at macro and system level. Testcases and testbench components written in System Verilog. Ran code coverage tool to estimate the code coverage and to know the uncovered areas to target new test cases to write.
• Participated actively in design spec, RTL design in Verilog, backend scripts review and provided valuable feedback.
• Led post-silicon initial bring-up and facilitated system characterization efforts in lab by creating a functional modes system setup document and all software scripts to setup device in specific modes. Correlated power measurements with ATE.

Analog Verification Engineer

• Senior Analog Verification Engineer experienced with Verification of Analog Designs
• Texas Instruments Experience and References
• Cadence Tool experience

Digital Design Engineer

A seasoned Digital Design Engineer. Her experience has focused on design, development, and debugging test patterns. This comes with a strong commitment to the company’s financial stability and profit growth.

Among other qualifications, she brings:

• Extensive expertise in designing control logic for multiple devices.
• A complete understanding of DFT design.
• Experience in working with multiple teams, including design, application, and test teams.
• Demonstrated success in developing, verifying, and releasing test patterns for ATE tests.

Sr. Physical Design Engineer/EDA

Senior Design Engineer experienced in a broad range of logic and physical design areas, from design flow creation to physical design sign-off. Managed and led multiple projects with highly aggressive project schedules. Responsible for all design aspects from synthesized RTL logic to tape-out. Physical designs are done by synthesized, semi-custom, and custom design methods; utilizing 28nm, 20nm, and 14nm nodes.

Among other qualifications, he brings:

• Timing Closure/Analysis
• Flow Automation
• Physical Verification
• UPF/CPF coding/Verification
• Power Routing/Validation
• Signal Integrity
• Clock Tree Distribution
• Floorplanning
• Formal Verification
• EMIR
• Power Grid Design
• Sign-off Verification

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