Scree – Physical Design Engineer [Available April 15, 2018]
- 5 years’ experience
- Floor planning, placement, Clock Tree Synthesis, Routing
- Physical optimization - timing, power, area
- Static Timing Analysis signoff, power analysis
- Physical hardening of complex sub-designs
- Top level design planning, I/O placements, and full-chip closure.
- Signal integrity analysis
- Design Rule checks, Logic equivalence checks
- Design automation using scripting language
