Chang – AMS Verification Engineer
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Verilog A
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Identify and log bugs
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Work with Design team to resolve issues
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Conduct Regression test and compare to spec
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Creating Test Benches in Verilog/SysVerilog
Posted on February 28, 2019 by Nick Trompert
Verilog A
Identify and log bugs
Work with Design team to resolve issues
Conduct Regression test and compare to spec
Creating Test Benches in Verilog/SysVerilog
Topics: Verification Engineer, ams verification engineer
Nick Trompert is a Sr. Manager. He is responsible for connecting with the best engineering and information technology talent and resources in the world. He is one of the founders of Talent 101 and joined full time after college.
nickt@talent-101.com
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