Janie – AMS Verification Engineer
- Verify the performance of analog and mixed-signal integrated circuits and systems through a combination of behavioral modeling, simulation, and regression testing, including:
- Development of behavioral models using Verilog A, Verilog AMS, and real number models to represent desired performance or measured performance of specific functional blocks within an analog or mixed-signal system.
- Specification and automation of test and regression requirements for analog and mixed-signal electronic systems. Experience with Cadence Virtuoso and SystemVerilog. Familiarity with formal verification techniques.
- Design and analysis of analog and mixed-signal integrated circuits
- Simulation using transistor level simulation tools such as Spectre and AFS, event-driven simulation tools such as NCSIM, and mixed-signal simulators such as AMS.
- Master of Science in Electrical Engineering (Circuits and Systems)