Bhowham – Architect/Design & Verification Senior Engineer
- Extensive and progressive cross-functional experience in working with Standards team, Algorithm & Systems team, Application, Benchmarking, Physical Design, and compiler/Software teams.
- Broad knowledge of digital hardware architecture/implementation, providing decisive leadership with analytical rigor identifying improvement areas (Micro-Arch and SOC-Arch) and drive implementation of solutions within PPA budget and schedule.
- Drive solutions from idea to hardware implementation, keeping application requirements/scalability and agility along with Power/Performance/Area trade-offs in mind (using Verilog, SystemVerilog, VHDL, Shell scripting, Synopsys tools, PERL, SystemC, Microsoft Visual Studio).
- Strong experience in Architecture/Performance Analysis, Design/Verification/STA of Digital Design SOCs with focus on processors and memory subsystem.
- Strong experience in Modeling and Debugging complex ASIC systems including multicore processor subsystems (e.g Huawei’s home-grown DSP, memory subsystem, TI’s Keystone devices including Cortex-A15: 4-core ARM CPU, COREPACK: 8-core TI DSP C6x series with multilevel memory subsystem with multilevel caches), EMIF Controller/DDR.