Rene – Circuit Design/Layout Engineer
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CMOS Digital 16x16 crossbar switch - Tools: Cadence Virtuoso
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Designed a digital switch using 16:1 multiplexer and 64-bit shift register on IBM 180 nm CMOS technology
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Performed DRC, LVS and parasitic extraction along with post-layout simulation for the PCB layout of the circuit
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Achieved an overall speed of 22.93 GHz for the entire circuit
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Datapath synchronous controller design - Tools: Altera Quartus II
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Designed an ASIC using a datapath and controller to perform the Newton-Raphson equation to calculate inverse of a number
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Modeled the controller using only Verilog and used schematic capture and Verilog for the datapath
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Worked on block level synthesis, circuit debugging and static timing analysis on the entire design
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CMOS DC-DC boost converter - Tools: Cadence Virtuoso
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Designed and simulated a DC-DC converter using boost topology which increases a low input dc voltage to a high dc voltage
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Utilized the analog design environment on Cadence to run transient and dc simulations on multiple nodes of the circuit
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Obtained a dc output of 1.5 V for a dc input of 0.8 V using TSMC 130 nm CMOS technology
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Master of Science in Electrical Engineering
