Talent 101 Circuit

Design/Verification Engineer with EE Masters Degree Available

Posted on February 15, 2017 by Kent Smith

Sai - Analog Mixed Signal Design/Verification Engineer

  • Design of Analog blocks for capacitive touch circuits.
  • Analog-Mixed signal verification at chip level.
  • Write, debug, and run test benches using Verilog-A/Verilog-AMS/System Verilog to verify both models and transistor-level circuits at all operating modes using the AMS-Designer environment.
  • Design functional models for Buck, Boost, LDO, Load Switch, RCO, Rectifiers, Analog comparators, PLL, ADCs in Verilog-AMS/DMS.
  • Integration of full chip and Top Level simulations for ICs with the Power Management and Wireless Battery Charging circuits.
  • Create, debug, and run test benches to execute transistor-level performance verification over design corners using the Spectre circuit simulator.
  • Mix and match of Verilog and Spice netlist in Chip Level Simulations.
  • Master of Science – Electrical Engineering

Topics: Analog Designer, Semiconductor Talent

Kent Smith

Kent Smith is a Senior Business Development Manager at Talent 101. He is responsible for managing the semiconductor engineering solutions at Talent 101’s clients. His expertise includes recruiting and workforce solutions, and working with engineering groups at Talent 101’s clients to improve business performance.

kents@talent-101.com