Xian – Digital Front/Backend Design Verification Engineer
- Experienced with digital and analog/digital mix-signal SoC integration and verification, logic synthesis, chip and block level verification, DFT, ATPG, static timing analysis, chip bonding, floorplan, clock tree synthesis, Place and Rout.
- Experienced in microprocessor-based system design. Developed chips and functional blocks including RTL coding, verification, timing closure, firmware generation. Developed FPGA demonstration systems.
- Experienced in embedded system programming, firmware design and development.
- Experienced design debug system with JTAG technology.
- Highly motivated senior design engineer with experience in chip & board design.
- M.S. in Electrical Engineering.