Juan – IC Design Engineer
- Creative and competent IC design engineer capable of working as an individual contributor or working effectively within a team environment in the technical definition, design and validation of schedule driven mixed signal IP
- Extensive experience in the design, implementation and debug of ESD and latch-up tolerant networks and circuits
- Highly proficient in floor-planning of circuits, ESD/latch-up tolerant layout practices and analog layout techniques
- Solid experience in the design, debug and optimization of continuous time analog circuits such as LDO regulators, voltage and current references, amplifiers, comparators, crystal oscillators and mixed-signal I/Os
- Comprehensive debug skills including micro-probing, basic physical analysis and ESD/latch-up debug
- Master of Science in Electrical Engineering
