Talent 101 Circuit

Experienced Design Verification Engineer Available

Posted on July 07, 2017 by Kent Smith

Nicholas – Design Verification Engineer  

  • Extensive experience in the Design Verification at both block and SoC levels.
  • Skilled in directed and constrained-random test benches.  Proficient in Object-Oriented programming.  
  • Languages – System Verilog, Verilog, SVA, C, Perl, shell scripts, assembly (e200, e500, HC08, HC12).
  • Verification Methodologies – UVM, VMM.
  • Simulators – VCS, NC Verilog (Incisive), Verilog XL.
  • Waveform Viewers – Debussy, DVE, Signal Scan, SimVision
  • Code coverage tools – HDLScore, CoverMeter
  • Operating Systems – UNIX, Linux, AIX, MS Windows.
  • Strong verification skills – Problem solving, debugging, verification planning.
  • Bachelor of Science in Electrical Engineering

Topics: Semiconductor Talent, Verification Engineer

Kent Smith

Kent Smith is a Senior Business Development Manager at Talent 101. He is responsible for managing the semiconductor engineering solutions at Talent 101’s clients. His expertise includes recruiting and workforce solutions, and working with engineering groups at Talent 101’s clients to improve business performance.

kents@talent-101.com