AJ – Design Verification Engineer
- Design Verification + Emulation Engineer, with hands-on technical experience in ASIC & FPGA Verification and Emulation.
- Expert knowledge in advanced design verification using System Verilog & UVM.
- Experience in networking protocol (PCIe), Interconnects, & external interfaces Ability to analyze technical requirements, understand micro-architecture, schematic and implement solutions.
- Work collaboratively with IC project leaders delivering complete environments achieving coverage.
- EDA Tools/Language: DVE, VCS Verdi, Questa, DVT, Proto-compiler, Xilinx Vivado, HLS, SDK, IPI, Synplify Premier, Power Aware, DWC, IXCOM, Semifore, Questa Property Check, Questa Cover Check / C, C++, Verilog, SV, SVA, TCL.
- Instrumentation: Oscilloscope, Logic Analyzer, Spectrum Analyzer, PCIe, USB Analyzer, SONET Test Set.
Nick Trompert is a Sr. Manager. He is responsible for connecting with the best engineering and information technology talent and resources in the world. He is one of the founders of Talent 101 and joined full time after college.