Talent 101 Circuit

Layout Engineer Available

Posted on August 08, 2017 by Kent Smith

Janice – Analog AMS Layout Engineer

  • Created custom layouts for LDOs Power Controller, LFO, HFO, and REF_SYS.
  • Floorplan, module interconnect, power routing and quality assurance of top level blocks
  • Created custom high voltage layouts for Oscillators, Current References, Charge Pumps, Voltage Regulators and various other cells used in the Flash Charge Pump
  • Created custom high voltage layouts for Sense Amplifiers, Column Muxes, Row Decoders, high voltage Drivers, Column Decoders, Sense Amp timing circuits, input and output Bbuffers, high voltage Power Switch, Reference Current Generator and Mux, and various logic control circuitry for the Flash. Floorplan, module interconnect, power routing and quality assurance of top level chip
  • Custom layout of low voltage modules for cell phones – ADCs, DACs, LDOs, Bandgaps, Bias Generators, Reference Buffers, and Amps with emphasis on common centroid matching, isolation, and shielding, using up to 8 metal layers.
  • Verification of design

Topics: Semiconductor Talent, Layout Engineer

Kent Smith

Kent Smith is a Senior Business Development Manager at Talent 101. He is responsible for managing the semiconductor engineering solutions at Talent 101’s clients. His expertise includes recruiting and workforce solutions, and working with engineering groups at Talent 101’s clients to improve business performance.

kents@talent-101.com