Jian – IC Layout Engineer
- Good understanding of CMOS Design, circuit simulation, circuit board and basic gates like NAND, MUXs,FFs etc.
- Familiar with IPC-A-600,610,613 standards
- Strong hold on IC Fabrication processes like diffusion, oxidation, lithography, etching, PVD and CVD
- Excellent team player with good communication, presentation and organization skills
- VLSI: CMOS Logic, Circuit simulation, Semiconductor Fabrication Processes, Layout design rules,Verilog/VHDL programming, Cadence Tool, RTL design flow, Combinational and Sequential circuit design.
- Linear Integrated Circuits: Op-Amps, A/D convertors, Integrators and Oscillators.
- Other: Wireless Communications, Digital Communications, Digital Signal Processing, Information Theory and Coding
- Programing Languages: C, VHDL, System Verilog, MATLAB and basics of TCL
- Tools: Microsoft office, PSPICE, T-spice, Cadence Virtuoso, EDA and Basics of Altium Designer
- Master of Science in Electrical & Electronics Engineering
