Talent 101 Circuit

Physical Design Engineer with M.S. in Electrical Engineering

Posted on March 24, 2020 by Nick Trompert

Jaycee – Physical Design Engineer 

  • Core experience centered around physical design of large complex CMOS ASIC SOC designs using industry standard tools i.e. innovus, ICC, talus and PrimeTime. 
  • Experienced in synthesis, formal verification, floor planning (block and top level), power creation and repair, timing driven placement and routing, CTS, timing convergence and analysis, noise convergence and analysis, LVS and DRC.
  • Goal-oriented and have taped out successfully many designs individually or as a significant contributor.
  • Skills:
    • Proficient in Cadence's SOC FE , Synopsys' ICC and  talus performing synthesis, place and route, timing closure and power analysis. 
    • Intermediate user of Mentor’s Olmpus tool.  
    • Proficient user of PTSI from Synopsys and Calibre performing LVS/DRC.  
    • Intermediate skill in tcl development. 
  • MS in Electrical Engineering.

Contact Us About This Candidate

Topics: Physical Design Engineer

Nick Trompert

Nick Trompert is Talent 101’s Marketing Manager. He is responsible for connecting with the best engineering and information technology talent and resources in the world. He is one of the founders of Talent 101 and joined full time after college. He holds a Bachelors Degree in Marketing from Tabor College.

nickt@talent-101.com