Grayson – Physical Design Engineer
- Experienced Physical Design Engineer in high-technology industry with proven expertise worked on numerous ASIC chip designs using various technology processes and challenging designs in advance CMOS technology nodes.
- Work experience on both SOC and CPU designs.
- Technical skills:
- Hardware: HP9000, SUN-OS, PC, and Macintosh
- Operating Systems: UNIX, Linux, MSDOS, Widows, X-Windows, Windows XP
- Language: TCL/Tk, Bash, C-shell, HTML, VHDL, and Verilog
- Tools: Cadence tools, SOC_Encounter (First Encounter, Nanoroute), Qplace, HyperExtract, PKS, syn2gcf, syn2tlf, Design Planner, Daphne, Design Compiler and ICC & ICC2 Synopsys tools. Vantage, Motive, Prime Time, Calibre, ClearDDTs, ClearCase, DesignSync
- Web Design Tool: Dreamweaver CS4, Flash CS4, Photoshop
- Master of Science, Electrical & Electronics Engineering