Jun – IC Layout Engineer
- Hands on experience with FPGA Design and Implementation, RTL Design and Verification, ASIC Design.
- Hands on experience with Nexys 2 Spartan-3E FPGA Trainer Board and Mercury Development Board.
- Excellent independent work on ASIC/ PD flow and hands on experience with RTL to GDS II flow.
- Hands on experience with Floorplan, Power plan, Place & Route, CTS, STA and Timing Closure.
- Familiar with JTAG, PCIe, SPI, i2C, DDR, TCP/ IP, Ethernet Interface Protocols and DSP techniques.
- Proficient in coding and de-bugging using C, C++, VHDL and Verilog.
- Familiar with scripting using Perl, TCL, Cshell, Python and UNIX.
- Master ‘s in Electrical Engineering
Topics:
Semiconductor Talent,
Layout Engineer
Kent Smith
Kent Smith is a Senior Business Development Manager at Talent 101. He is responsible for managing the semiconductor engineering solutions at Talent 101’s clients. His expertise includes recruiting and workforce solutions, and working with engineering groups at Talent 101’s clients to improve business performance.
kents@talent-101.com
