Talent 101 Circuit

Senior Analog Layout Engineer Available

Posted on September 19, 2016 by Kent Smith

Dwayne – Senior Analog Layout Engineer  

  • Senior Mask Designer with Top Level Floor Planning.
  • Extensive layout experience in both Analog and Logic Circuits including ESD, I/O’s, Standard Cells, Self-Bias PLL’s, LC Tank PLL’s (8 Ghz), DLL’s, Precision OpAmps, Low Noise Amps, Comparators (including hysteresis & latched output types), Commutating Amps, LDO’s (including Low Pwr), Hard Macro’s (Analog sub-system blks), Test Chip top level create (including schematic, layout, and I/O Ring) and full Mixed Signal Chips.
  • Lead Layout for team (2 other Mask Designers) responsible for the Floor Plan, Layout, & schedule management of an extremely low power 8 Meg eFRAM COT Embedded Macro for Medical Applications. Created a grid based methodology that assured DRC compliance to all density specs including FEOL, BEOL, and FeCap Fill.
  • Familiar with both TI and National Semiconductor processes.

Topics: Analog Designer

Kent Smith

Kent Smith is a Senior Business Development Manager at Talent 101. He is responsible for managing the semiconductor engineering solutions at Talent 101’s clients. His expertise includes recruiting and workforce solutions, and working with engineering groups at Talent 101’s clients to improve business performance.

kents@talent-101.com