Talent 101 Circuit

Dora – Sr. Digital Verification Engineer

• Senior Design/Verification Engineer for Digital and Mixed Signal. 
• Expert in RTL Coding, Design Verification with UVM and OVM, Digital Verification, Soc Validation, FPGA Design and Test, C/C++ and Math Compiler Library.
• System level tests with RGB image inputs to exercise DRAM controller and DMD serial link controller. Wrote Perl script to convert model output to RGB images. Debug DRAM and sequencer settings.
• Testbench for ARM Cortex subsystem with AXI, AHB, TCM, APB bus, bridges and peripherals. Wrote checkers and tests to exercise all the bridges and peripherals including SPI and OCP interface with SPECMAN.
• Testplan for Parallel Flash Controller and wrote SPECMAN model of NAND flash memory. 
• Tested program fetches and execution from ARM and uncovered functional bugs through Incisive RTL simulator. 
• Testbench for AHB router with ARM and 2 DMA masters. 
• Wrote tests to exercise AHB master arbitration and debug cases of bus protocol checker violations. Collected and analyzed functional and code coverage data.   
• Wrote testplan for RGB format to Tile format convertor. Debugged mismatches of C-model output to RTL simulation outputs. Wrote checkers for pixels position and wrote coverage-driven random tests to capture bugs.  
• Testbench for video input and decoder unit. Converted RGB images into pixel-port testbench input files with correct video sequencing. Debugged system clock issue and wrote Perl scripts to automate test generation.