Talent CIRCUIT (8)

Product Engineer with 10+ years of engineering experience

Posted on October 08, 2019 by Nick Trompert

Colt – Product Engineer

10+ years of engineering experience in testing complex microprocessor and central processing units which include result analysis, test drive, specification compliance and documenting composing.
Experienced in product debug, productions test development, manufacturing release and supporting which including data collection/analysis, yield improvement and root cause problem solving.

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Digital Design Engineer with MS in Computer Engineering and specialization in Digital VLSI

Posted on October 02, 2019 by Nick Trompert

Gaya – Digital Design Engineer

Physical Design and Layout generation and Place and Route using CAD tools experience.
Logic design, RTL design, Gate level synthesis and Timing analysis experience.
Good understanding of artificial neural networks in machine learning such as CNN, RNN and LSTM.

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Digital Design Engineer with 4+ years of work experience in design of FPGA

Posted on September 25, 2019 by Nick Trompert

Vaj – Digital Design Engineer

4 Years of work experience in design of FPGA
Academic experience in developing Digital designs on FPGA
Experience in the full FPGA design life cycle

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Product Engineer with 6+ years of experience in Product Research Engineering and R&D

Posted on September 19, 2019 by Nick Trompert

Ari – Product Engineer

Engineering professional with 6+ years of experience in Product Engineering, Product research Engineering and R & D
Leverage technical abilities, strong collaborative nature, excellent communication and presentation skills and business-wide perspective to act as liaison between departments, vendors and customers to drive projects and solve problems

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Analog/Mixed Signal IC Design Engineer

Posted on September 17, 2019 by Nick Trompert

Tang – Analog/Mixed Signal IC Design Engineer

Semiconductor advance node processes: BiCMOS, CMOS and FinFET. Create custom design reference database for advanced process nodes: FinFET 14nm, 11nm, 10nm, 8nm, 7nm.
Experience with op amps, high-speed SerDes designs and adaptation process for serial link.
Front-to-back experience with transistor level design: Cadence tools (Schematic XL, ADE L/XL, Spectre (RF), Virtuoso Layout XL, PVS DRC / LVS, and QRC extraction).

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Mechanical Engineer with 7+ years of solid work experience in Mechanical Engineering R&D

Posted on September 12, 2019 by Nick Trompert

Richard – Mechanical Engineer

7+ years of solid work experience in Mechanical Engineering R&D
Experience in CNC Machining / Manufacturing
Experience in Software Development

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Validation/Characterization Engineer

Posted on September 10, 2019 by Nick Trompert

Macario – Validation/Characterization Engineer

Silicon Verification & Validation
Issue tracking & investigation
Characterization (according to AEC-Q003) – including DoE

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AMS Verification Engineer

Posted on September 04, 2019 by Nick Trompert

Janie – AMS Verification Engineer

Verify the performance of analog and mixed-signal integrated circuits and systems through a combination of behavioral modeling, simulation, and regression testing, including:
Development of behavioral models using Verilog A, Verilog AMS, and real number models to represent desired performance or measured performance of specific functional blocks within an analog or mixed-signal system.

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Qual & Test Technician

Posted on August 29, 2019 by Nick Trompert

Joshua – Qual & Test Technician

Testing and collecting of data of semiconducting devices on a multi-test handler
Assembling customer samples for use in prototype devices
Characterization of temperature data during stress testing
Recording and inputting test data on share drives

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Physical Design/Digital Back End Engineer

Posted on August 27, 2019 by Nick Trompert

Sangh – Physical Design/Digital Back End Engineer

Part of physical design team, worked closely with digital and analog teams to deliver design of mixed signal block on time under tight schedule
Working on complex digital on top lower power design
Define and verify power intent
RTL synthesis

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