Talent 101 Circuit

Kent Smith

Kent Smith is a Senior Business Development Manager at Talent 101. He is responsible for managing the semiconductor engineering solutions at Talent 101’s clients. His expertise includes recruiting and workforce solutions, and working with engineering groups at Talent 101’s clients to improve business performance.
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Recent Posts

System Engineer with Double Masters of Engineering

Posted on May 05, 2017 by Kent Smith

Louie – System Engineer    

  • Programming Language:  C, C++, and C #, Java, Python, RTL, VHDL, Verilog, and System Verilog, Assembly language
  • EDA Tools:  Cadence (Virtuoso, Encounter), Hspice, Synopsys (Design Compiler), Mentor Graphics (ModelSim), Prime Time, EDA playground
  • Tools/Applications:  MATLAB, Flex and Bison, Visual Studio, Dev C++ (IDE), Code Block, Eclipse
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Electrical Engineer with PCB Layout Design Skills

Posted on April 28, 2017 by Kent Smith

Dipta – Electrical Engineer

  • Worked on developing a DC-DC boost converter to be used for consumer electronics using IBM 0.18um technology
  • Studied and redesigned different DC-DC boost topologies to achieve maximize voltage efficiency
  • Assisted Ph.D. candidates and other graduate students with PCB layout design for their research projects
  • Aided Ph.D. candidates with designing components of PLL (phase locked loop) like VCO (voltage controlled oscillator) and filters
  • IC Design Tools:  Cadence Virtuoso, Synopsys DC, Cadence Assura (DRC, LVS,QRC), Cadence Encounter, OrCAD, Altera Quartus II, Multisim, Altium Circuit Maker, LabVIEW
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IC Layout Engineer Experienced with Multiple Tools

Posted on April 27, 2017 by Kent Smith

Samuel – Senior IC Layout Engineer

  • Solid history of establishing and maintaining positive working relationships with Design, Product and Test Engineers
  • Analytical and resourceful in solving new and challenging problems
  • Self-motivated individual contributor and positive team player  
  • Goal-directed with focus on details and follow-through
  • Cadence Virtuoso and VXL
  • Hercules (DRC, LVS, EMC)
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Candidate with MS in Electrical Engineering Available

Posted on April 26, 2017 by Kent Smith

Gilberto – Electrical Engineer  

  • Electrical Engineer with total 5+ years of engineering experience
  • Excellent knowledge of digital and analog system design and testing
  • Extensive knowledge of the design concepts and applications of signal processors, ASIC Design & Verification, Microprocessors and very-large-scale integration circuit systems
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Qualified IC Layout Engineer Available

Posted on April 24, 2017 by Kent Smith

Jun – IC Layout Engineer

  • Hands on experience with FPGA Design and Implementation, RTL Design and Verification, ASIC Design.
  • Hands on experience with Nexys 2 Spartan-3E FPGA Trainer Board and Mercury Development Board.
  • Excellent independent work on ASIC/ PD flow and hands on experience with RTL to GDS II flow.
  • Hands on experience with Floorplan, Power plan, Place & Route, CTS, STA and Timing Closure.
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Experienced SolidWorks Designer Available

Posted on April 20, 2017 by Kent Smith

Mary – SolidWorks Designer  

  • Degreed professional with design/drafting experience from conception through production.
  • Hands-on, self-directed, and self-motivated, while having the ability to work independently as well as an integral member of a team to gather data and complete job assignments on time.
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Experienced Design Layout Engineer Available

Posted on April 18, 2017 by Kent Smith

Wang – Design/Layout Engineer  

  • Design/Layout Engineer with over 10 years’ experience dealing with the design/layout of analog and/or mixed signal products
  • Design lead of Serial EEPROM (SPI/I2C) products which include analog (voltage/current references), and +16V (charge-pumps, regulators, level-shifting) circuit blocks
  • Design lead of RTCC products (SPI/I2C) which include analog (voltage/current references), memory (EEPROM, SRAM), and +16V (charge-pumps, regulators, level-shifting) circuit blocks
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Master's Level Electrical Engineer Available

Posted on April 12, 2017 by Kent Smith

Srikanth – Electrical Engineer  

  • Academic experience in ASIC/ SoC RTL Design (with Verilog HDL and System Verilog) and Functional Verification.
  • Hands-on experience of RTL Logic Synthesis, Static Timing Analysis (STA), Power Analysis and Optimization
  • VLSI Proficiency:  ASIC and FPGA Design flow, Physical Design flow (Floor planning, Placement, CTS and Routing), Physical Verification, Signal Integrity and CMOS IC Design, Characterization, Simulation and Layout
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Senior Mechanical Engineer with 10 Years Experience

Posted on April 07, 2017 by Kent Smith

Ramiro – Senior Mechanical Engineer  

  • Over 10 years industrial experience spanning functional tasks including Mechanical design, process improvement, product design/development, independent evaluation, implementation of the new project/design based on recommendations related to material handling systems.
  • Experienced in design of new or upgraded conveyors, feeders, pneumatic and hydraulic conveyors and other material handling equipment.
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Mechanical Engineer with Manufacturing Planning Experience

Posted on March 31, 2017 by Kent Smith

Tina Mechanical Engineer

  • An Engineer with 5 years of experience in reviewing and inspecting parts that transitioned across several manufacturing plants.
  • Evaluating all specifications regarding special processes used in order to manufacture parts.
  • Skill sets include:  writing and maintaining manufacturing planning and sketches for detailed parts and assemblies
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