Talent 101 Circuit

Ahmed – Senior Analog RF Layout Design Engineer 

• Cadence Virtuoso 6.1.7 Open Access, Cadence GXL/VXL, Cadence Diva, Cadence Dracula
• Cadence Assura for LVS/DRC/Parasitic Extraction
• Cadence VCR, Cadence P-Cell Creation, Cadence Multiple Part Path
• Cadence Shape Based Router  (CSR) Cadence  Space Based Router
• Cadence Automatic Router Cadence Wire Assistant

Jerry – Senior FPGA/ASIC Designer

• Logic design and verification, behavioral modeling and analog mixed-signal simulation and debug skills. Expertise in Verilog and VHDL coding, functional verification, synthesis, timing analysis, and micro architecture. Wrote and ran regression tests using TCL.
• Wrote VHDL and Verilog for DSP libraries and simulated these functions using MODELSIM.
• Wrote Perl programs to run all the VHDL and Verilog simulations.
• Logic Design/Verification (15 yrs.), RTL coding (10 yrs.), Verilog (10 yrs.), VHDL (10 yrs.).
• Analog Mixed-signal Simulation (Using SPICE and ModelSim) (18 years), UNIX (14 yrs.).

Shima – Senior IC Layout Design Engineer 

• Lead, schedule and plan circuit projects that are both efficient and cost effective within time scheduled
• Supervised and instruct team members through all phases of project
• Created layout that can and will save silicon waste and dollars
• Created the tightest compaction of layout possible
• Performed layout of Analog and Digital circuits in 250nm, 180nm, 130nm, 90nm, 65nm, 45nm, 40nm, 28nm and 10nm/finfet technologies
• Performed layout of RF/Analog circuits

Abdul – Software Quality Assurance (SQA) Engineer 

• Strong background in full software development life cycle (SDLC). 
• Proven history of writing detailed test plans and test cases from design specifications. 
• Executes manual and automated test cases ensuring delivery of quality software products.
• Success working with changing priorities and responding to critical issues. 
• Conscientious contributor completing tasks on or ahead of schedule. 

Ryan – Senior Test Technician

• Ensured quality of work/product met Company standards, worked closely with QA Engineer daily
• Complied with policies, guidelines and regulatory requirements per Avigilon's Quality Management System
• Received product, sorted, debugged, and evaluate, reported failures/concerns
• Debugged electronic circuits and troubleshoot and reported issues
• Analyzed errors in electronic design and production, defining failure modes
• Provided detailed product evaluation information to help drive improvements and corrective actions

Kyle – Verification Engineer

• RF Circuits & Network Theory
• Link budget, EVM
• LNA, Mixer, Pa and Filters
• Switch, Transmitter & Receivers
• RF testing, troubleshooting, debugging, developing & automated test systems
• PCBs test & repair, QA & QC

Norma – Engineering Test Technician  

• Responsible for product testing of ADS548X analog to digital converters
• Created Bin summary
• Fail analysis using Data power and Spotfire
• Provided support to Test Engineers by data acquisition, failure analysis, qualification testing, soldering and desoldering IC on PCBs, sample testing, characterization, product qualification testing, extracting data from Test ware Data Extraction, test board verifications, monitors production and yield percentage
• Generated reports for Engineers using Microsoft Powerpoint and Microsoft Excel

Zak – Senior Engineering/Test Technician

• RF Characterization
• Gallium Nitride RF FETs, Wafers, and fixtured devices
• Load pull – calibration 12 Benches including Mesuro, Focus, and Maury Microwave
• S-parameters - Agilent Precision Network Analyzer to 67 & 110GHz
• RF Power measurements
• Various DC Tests- Pulsed IV, DC Transfer, And Three Terminal Breakdown
• Collect and analyze laboratory data and prepare circuit characterization reports for modeling and qualification
• Test fixture design and fabrication-AutoCAD, Bridgeport mill, Lathe, Drill press, band saw
• Under minimal supervision
• Lab Management duties 

Joshua – System Engineer 

• Design and engineering experience with commercial, military and space grade RF and Microwave hardware, including frequency sources, power amplifiers, mixers, filters and passive components.
• Characterized, simulated, tested, screened, and improved numerous designs employing mixed signal technology resulting in world-class products.
• Design Software:  NI LabVIEW, Multisim, AutoCAD, Cadence OrCAD PSPICE & Schematic Capture, Allegro HDL, Agilent Genesys, Agilent Advanced Design Software (ADS), AnsoftHFSS, Operating Systems, Windows 2000/XP/Vista/7, UNIX
• Programming Languages:  MATLAB, C/C++

Shiva – Physical Design Engineer 

• Physical Design Engineer in the field of Semiconductor design.
• Experienced in ASIC design flow from RTL to GDSII: RTL Synthesis, Floor Planning, Power Planning, Placement and trail routing, CTS, Routing, Parasitic Extraction, STA & SI, and DRC/LVS.
• Hands on experience in RTL design and verification of digital design using Verilog.
• Proficient scripting skills in Perl, TCL, and Shell.
• M.S. in Electrical Engineering