Talent 101 Circuit

Adam – Senior Layout Designer

• Experienced in digital layout in areas such as microprocessor, Digital Signal Processor (DSP), System on a Chip (SoC), RAM, EPROM, and fully differential logic
• Experienced in analog layout in areas such as Comparators, Digital to Analog Converters (DAC), Phase Lock Loops (PLL), Bandgaps, and Voltage Regulators

Naveen - Analog Layout Engineer  

Base Band Filter (BBF): 

• Description: It amplifies difference of voltage.
• Targeted Technology: TSMC 90nm
• Role: Develop layout from schematic, floor plan, placement, routing and clean DRC, LVS and QRC.
  

Low Noise Amplifier (LNA):

• Description: LNA is an electronic amplifier that amplifies a very low-power signal without significantly degrading its signal-to-noise ratio.
• Targeted Technology: TSMC 90nm
• Role: Develop layout from schematic, floor plan, placement, routing and clean DRC, LVS and QRC.

Changpu – Characterization Engineer

• Developed and completed the following items for DC/DC Buck converter characterization and verification:
• Characterization Plan
• Used Cadence Capture/Allegro to Design the Schematic and Layout for Evaluation board
• Bench Hardware Setup
• LabVIEW GUI
• Failure Analysis on the Hardware

John - Analog IC Designer  

• Designed the following blocks:
• FLL frequency control loop for  buck converter
• Rail to Rail PWM comparator
• Band Gap reference
• Compensator

Jose – IC Design Engineer

• Oversaw development of all power management IP (Buck, Boost, LDOs) and other analog IP (GPADC, PLL)
• Oversaw Floor-planning and module layout development
• Managed customer interaction to make sure alignment was maintained on technical and project aspects
• Designed boot regulator to allow switch to be brought above input voltage to improve RdsOn

Sai - Analog Mixed Signal Design/Verification Engineer

• Design of Analog blocks for capacitive touch circuits.
• Analog-Mixed signal verification at chip level.
• Write, debug, and run test benches using Verilog-A/Verilog-AMS/System Verilog to verify both models and transistor-level circuits at all operating modes using the AMS-Designer environment.
• Design functional models for Buck, Boost, LDO, Load Switch, RCO, Rectifiers, Analog comparators, PLL, ADCs in Verilog-AMS/DMS.
• Integration of full chip and Top Level simulations for ICs with the Power Management and Wireless Battery Charging circuits.
• Create, debug, and run test benches to execute transistor-level performance verification over design corners using the Spectre circuit simulator.
• Mix and match of Verilog and Spice netlist in Chip Level Simulations.
• Master of Science – Electrical Engineering

Kent– Circuit System/Design Engineer  

• Power over Ethernet (PoE)
• Power over Data Lines (PoDL) integrated circuits
• Current-limited voltage source for PoDL detect circuit
• Sense chopper amplifier for PoE
• Design for satellite TV receiver set top box SOC

Kumar – Layout Engineer

• Desigining custom TCell’s for layout using C language in various semiconductor process nodes ranging from 0.18um – 45nm.
• Layout of new memory IP’s in various semiconductor process using L-edit.
• Managing the layouts of existing memory IP’s and performing physical verification using Calibre.

Maha - Electrical Engineer

• VLSI design
• Advanced Digital LogicM
• Testing and Testable design of VLSI
• Computer architecture
• Analog IC design
• RF and Microwave Amplifier design
• Digital Signal Processing
• Master of Science – Electrical Engineering

•  Experience in CMOS analog circuit desiger
• Strong in-depth knowledge in digital logic design of Verilog and HDL, Modelsim and Xilinx IS tool
• Knowledge of complex AC/DC analysis (poles, zeros, compensation)
• Full Custom Mixed Signal / Custom Layout and using DRC, LVS for verification
• Experience in Assembly Language, C++, Verilog, Perl, Matlab. HSPICE, Cadence, Mentor Graphic
• Experience using Verilog, Modelsim & Xilinx ISE tools such as Programmable Processors; Finite
• State Machine; Control unit with PC, IR, & controller; Memory Control and Ring Oscillators.
• MS in Computer Engineering