Talent 101 Circuit

Qualified IC Layout Engineer Available

Posted on April 24, 2017 by Kent Smith

Jun – IC Layout Engineer

  • Hands on experience with FPGA Design and Implementation, RTL Design and Verification, ASIC Design.
  • Hands on experience with Nexys 2 Spartan-3E FPGA Trainer Board and Mercury Development Board.
  • Excellent independent work on ASIC/ PD flow and hands on experience with RTL to GDS II flow.
  • Hands on experience with Floorplan, Power plan, Place & Route, CTS, STA and Timing Closure.
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Experienced SolidWorks Designer Available

Posted on April 20, 2017 by Kent Smith

Mary – SolidWorks Designer  

  • Degreed professional with design/drafting experience from conception through production.
  • Hands-on, self-directed, and self-motivated, while having the ability to work independently as well as an integral member of a team to gather data and complete job assignments on time.
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Experienced Design Layout Engineer Available

Posted on April 18, 2017 by Kent Smith

Wang – Design/Layout Engineer  

  • Design/Layout Engineer with over 10 years’ experience dealing with the design/layout of analog and/or mixed signal products
  • Design lead of Serial EEPROM (SPI/I2C) products which include analog (voltage/current references), and +16V (charge-pumps, regulators, level-shifting) circuit blocks
  • Design lead of RTCC products (SPI/I2C) which include analog (voltage/current references), memory (EEPROM, SRAM), and +16V (charge-pumps, regulators, level-shifting) circuit blocks
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Master's Level Electrical Engineer Available

Posted on April 12, 2017 by Kent Smith

Srikanth – Electrical Engineer  

  • Academic experience in ASIC/ SoC RTL Design (with Verilog HDL and System Verilog) and Functional Verification.
  • Hands-on experience of RTL Logic Synthesis, Static Timing Analysis (STA), Power Analysis and Optimization
  • VLSI Proficiency:  ASIC and FPGA Design flow, Physical Design flow (Floor planning, Placement, CTS and Routing), Physical Verification, Signal Integrity and CMOS IC Design, Characterization, Simulation and Layout
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Senior Mechanical Engineer with 10 Years Experience

Posted on April 07, 2017 by Kent Smith

Ramiro – Senior Mechanical Engineer  

  • Over 10 years industrial experience spanning functional tasks including Mechanical design, process improvement, product design/development, independent evaluation, implementation of the new project/design based on recommendations related to material handling systems.
  • Experienced in design of new or upgraded conveyors, feeders, pneumatic and hydraulic conveyors and other material handling equipment.
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Mechanical Engineer with Manufacturing Planning Experience

Posted on March 31, 2017 by Kent Smith

Tina Mechanical Engineer

  • An Engineer with 5 years of experience in reviewing and inspecting parts that transitioned across several manufacturing plants.
  • Evaluating all specifications regarding special processes used in order to manufacture parts.
  • Skill sets include:  writing and maintaining manufacturing planning and sketches for detailed parts and assemblies
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Experienced Candidate with Masters in Mechanical Engineering Available

Posted on March 30, 2017 by Kent Smith

Raheem – Mechanical Engineer

  • Mechanical design of pressure vessel and heat exchanger per ASME section VIII (boiler and pressure vessel code) ant TEMA
  • Strong FEA analysis background and project engineering
  • Compress 2016
  • DesignCalcs 2014
  • AutoCAD 2004, Pro/E Wildfire 2.0, Solidworks, Catia V5
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Design Engineer with Masters in Electrical Engineering

Posted on March 29, 2017 by Kent Smith

Jared – Component Design Engineer

  • Electrical Efficiency
  • Control Systems.
  • Power Electronics
  • Bioelectronics
  • Voltage Regulators
  • Power Systems
  • Python Development
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Experienced Design Engineer Available

Posted on March 27, 2017 by Kent Smith

Juan – IC Design Engineer   

  • Creative and competent IC design engineer capable of working as an individual contributor or working effectively within a team environment in the technical definition, design and validation of schedule driven mixed signal IP
  • Extensive experience in the design, implementation and debug of ESD and latch-up tolerant networks and circuits
  • Highly proficient in floor-planning of circuits, ESD/latch-up tolerant layout practices and analog layout techniques
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Experienced Senior IC Layout Engineer

Posted on March 24, 2017 by Kent Smith

Gopal – Senior Analog IC Layout Engineer

  • Experienced Sr. Analog IC Layout Engineer with 10+ years analog/mixed signal layout and engineering tech experience, working on custom analog/mixed-signal IC layout designs using VirtuosoXL (version IC5.1&6.1), Composer schematics; and Calibre, Assura, Hercules, and Dracula for verification, with Star-RC for parasitic extractions.
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